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project:ledum:start [2026/08/20 16:58] – joeproject:ledum:start [2026/08/20 17:29] (current) – joe
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 This project aims to design and develop a **central processing unit** (CPU) from the ground up, with all circuitry, instruction set, and ways of communication with peripherals devised completely by us. Ideally, at least one of the resulting designs should be so simple that it could be produced in silicon with primitive, 1980-style lithography. If this succeeds, we can advance to more sophisticated designs. This project aims to design and develop a **central processing unit** (CPU) from the ground up, with all circuitry, instruction set, and ways of communication with peripherals devised completely by us. Ideally, at least one of the resulting designs should be so simple that it could be produced in silicon with primitive, 1980-style lithography. If this succeeds, we can advance to more sophisticated designs.
 +
 +===== Released Repositories =====
 +
 +  * [[https://ledum.codeberg.page/ledum-definers/|Ledum Definers (DSL)]]
 +  * [[https://ledum.codeberg.page/ledum-bb68/|BB68 ISA]]
  
 ===== Project goals and timeline (very approximate) ===== ===== Project goals and timeline (very approximate) =====
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 If there is enough interest, we are streaming the workshops online using [[https://meet.jit.si/ledum-wg-meetup]]. We are also trying to get our A/V streaming and editing skills to a level that allows for publishing the recordings of the workshops. Any help with such endeavor would be more than welcome. If there is enough interest, we are streaming the workshops online using [[https://meet.jit.si/ledum-wg-meetup]]. We are also trying to get our A/V streaming and editing skills to a level that allows for publishing the recordings of the workshops. Any help with such endeavor would be more than welcome.
  
-==== Past Workshops ====+==== Past Workshops and Sessions ====
  
   * 2024-10-10 16:00 [[user:tma]] - Verilog I: Introduction to Verilog (CZ)   * 2024-10-10 16:00 [[user:tma]] - Verilog I: Introduction to Verilog (CZ)
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   * 2024-12-12 16:00 [[user:ccx]] -- History of Capability Systems I (CZ)   * 2024-12-12 16:00 [[user:ccx]] -- History of Capability Systems I (CZ)
   * 2025-01-09 17:00 [[user:hexo]] -- Adders and Multipliers (CZ/SK)   * 2025-01-09 17:00 [[user:hexo]] -- Adders and Multipliers (CZ/SK)
 +  * 2025-01-23 16:00 [[user:tma]] -- Wallace Tree (CZ)
 +  * 2026-06-05 16:00 [[user:tma]] -- Capabilities Discussion (CZ)
 +  * 2026-06-12 16:00 [[user:ccx]] -- Capabilities Discussion (CZ)
 +  * 2026-06-19 16:00 [[user:joe]] -- Capabilities Discussion (CZ)
 +  * 2026-04-23 16:00 [[user:joe]] -- Graphical Output, BIOS, Interrupts (CZ)
 +  * 2026-04-30 16:00 [[user:joe]] -- VGA monitor simulation, Forth, ABI (CZ)
 +  * 2026-07-09 16:00 [[user:joe]] -- Releases: ledum-definers, BB68 (CZ)
  
 === Things to read === === Things to read ===
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 <WRAP clear></WRAP> <WRAP clear></WRAP>
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-~~META: 
-status = active 
-&relation firstimage = :project:ledum:320px-ledum_palustre_bluehend.jpg 
-~~ 
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project/ledum/start.1787245098.txt.gz · Last modified: 2026/08/20 16:58 by joe